增加了HSMO整线优化方法,读取数据增加了供料器部分

This commit is contained in:
2025-08-10 16:58:42 +08:00
parent 045f2f394d
commit 4fd5560650
17 changed files with 1765 additions and 352 deletions

View File

@@ -1,4 +1,5 @@
from base_optimizer.optimizer_common import *
from base_optimizer.smtopt_route import *
def head_task_model(component_data, pcb_data, hinter=True):
@@ -6,11 +7,10 @@ def head_task_model(component_data, pcb_data, hinter=True):
mdl = Model('pick_route')
mdl.setParam('Seed', 0)
mdl.setParam('OutputFlag', hinter) # set whether output the debug information
mdl.setParam('TimeLimit', 600)
mdl.setParam('TimeLimit', 1000)
H = max_head_index
I = len(component_data)
S = len(component_data)
K = len(pcb_data)
nozzle_type, component_type = [], []
@@ -29,12 +29,16 @@ def head_task_model(component_data, pcb_data, hinter=True):
M = 10000
CompOfNozzle = [[0 for _ in range(J)] for _ in range(I)] # Compatibility
component_point = [0 for _ in range(I)]
component_point, component_fdn = [0 for _ in range(I)], [0 for _ in range(I)]
for _, data in pcb_data.iterrows():
idx = component_data[component_data.part == data.part].index.tolist()[0]
nozzle = component_data.iloc[idx].nz
CompOfNozzle[idx][nozzle_type.index(nozzle)] = 1
component_point[idx] += 1
component_fdn[idx] = component_data.iloc[idx].fdn
S = sum(component_fdn)
# objective related
g = mdl.addVars(list_range(K), vtype=GRB.BINARY)
@@ -94,7 +98,7 @@ def head_task_model(component_data, pcb_data, hinter=True):
range(-(H - 1) * r, S) for k in range(K))
# feeder related
mdl.addConstrs(quicksum(f[s, i] for s in range(S)) <= 1 for i in range(I))
mdl.addConstrs(quicksum(f[s, i] for s in range(S)) <= component_fdn[i] for i in range(I))
mdl.addConstrs(quicksum(f[s, i] for i in range(I)) <= 1 for s in range(S))
mdl.addConstrs(
quicksum(x[i, k, h] * y[s, k, h] for h in range(H) for k in range(K)) >= f[s, i] for i in range(I) for s in range(S))
@@ -110,7 +114,7 @@ def head_task_model(component_data, pcb_data, hinter=True):
# objective
mdl.setObjective(Fit_cy * quicksum(g[k] for k in range(K)) + Fit_nz * quicksum(
d[k, h] for h in range(H) for k in range(K)) + Fit_pu * quicksum(
e[s, k] for s in range(-(H - 1) * r, S) for k in range(K)) + Fit_mv * head_interval * quicksum(u[k] for k in range(K)),
e[s, k] for s in range(-(H - 1) * r, S) for k in range(K)) + Fit_mv * quicksum(u[k] for k in range(K)),
GRB.MINIMIZE)
mdl.optimize()
@@ -119,19 +123,21 @@ def head_task_model(component_data, pcb_data, hinter=True):
for k in range(K):
if abs(g[k].x) < 1e-6:
continue
component_assign, feeder_slot_assign = [-1 for _ in range(H)], [-1 for _ in range(H)]
component_result.append([-1 for _ in range(H)])
feeder_slot_result.append([-1 for _ in range(H)])
cycle_result.append(1)
for h in range(H):
for i in range(I):
if abs(x[i, k, h].x) > 1e-6:
component_result[-1][h] = i
component_assign[h] = i
for s in range(S):
if abs(y[s, k, h].x) > 1e-6:
feeder_slot_result[-1][h] = slot_start + s * interval_ratio - 1
feeder_slot_assign[h] = slot_start + s * interval_ratio - 1
if sum(component_assign) != -H:
component_result.append(component_assign)
feeder_slot_result.append(feeder_slot_assign)
cycle_result.append(1)
if hinter:
print(component_result)
@@ -143,7 +149,7 @@ def place_route_model(component_data, pcb_data, component_result, feeder_slot_re
mdl = Model('place_route')
mdl.setParam('Seed', 0)
mdl.setParam('OutputFlag', hinter) # set whether output the debug information
mdl.setParam('TimeLimit', 10)
mdl.setParam('TimeLimit', 1000)
component_type = []
for _, data in component_data.iterrows():
@@ -227,7 +233,7 @@ def place_route_model(component_data, pcb_data, component_result, feeder_slot_re
else:
# there are components on the head
mdl.addConstrs(quicksum(w[p, q, k, a] for a in A_from(h) for q in range(P)) + quicksum(
w[q, p, k, a] for a in A_to(h) for q in range(P)) + y[p, k, h] + z[p, k, h] <= 4 *
w[q, p, k, a] for a in A_to(h) for q in range(P)) + y[p, k, h] + z[p, k, h] <= 2 *
CompOfPoint[component_result[k][h]][p] for p in range(P))
# each head corresponds to a maximum of one point in each cycle
@@ -362,7 +368,9 @@ def place_route_model(component_data, pcb_data, component_result, feeder_slot_re
def optimizer_mathmodel(component_data, pcb_data, hinter=True):
component_result, cycle_result, feeder_slot_result = head_task_model(component_data, pcb_data, hinter)
placement_result, head_sequence = place_route_model(component_data, pcb_data, component_result, feeder_slot_result)
# placement_result, head_sequence = greedy_placement_route_generation(component_data, pcb_data, component_result,
# cycle_result)
# placement_result, head_sequence = place_route_model(component_data, pcb_data, component_result, feeder_slot_result)
placement_result, head_sequence = place_allocate_sequence_route_generation(component_data, pcb_data,
component_result, cycle_result,
feeder_slot_result)
return component_result, cycle_result, feeder_slot_result, placement_result, head_sequence